I’ve increased the sampling frequency to 23kHz and got much more stable results, stable enough to be useful.
The image here shows the current measured at 100 Hz for 10 s. 100 Hz is the frequency of the power-decision loop in Almabraxas 3. The “naive” sampling just read the value (as a 12 bits ADC conversion, thus in the range 0-4095). The other curve is a 23 kHz sampling averaged by the 100 Hz loop (that is 230 samples are averaged for every point). As we can see, we have a very stable (and usable) measurement using the 23 kHz sampling, while with a naive approach, the error bar is bigger than the values we want to discriminate, making it unusable.
The board is an STM Nucleo F446RE (STM32F4 / cortex M4), running at 180 MHz. The ADC clock is then 90 MHz. For the ADC, I’m using the biggest clock prescaler (8), and the longest sampling time (480 clock ticks per sample), thus 90 MHz / 8 / 480 = 23 kHz, counting the sampling startup time. The summation for averaging is performed directly in the ISR, without using a DMA.
In this configuration, I’m not sampling voltage (yet), but I’m planning to use the ADC2 in slave mode, thus maintaining the 23 kHz frequency with almost no overhead. I’m using mbed 5 which is great in general, but for now as no provision for continuous sampling, thus I had to write large part of this mechanism using the HAL.
Previously, I looked at the signal with an oscilloscope, and there are different noise components until at least 2 kHz, depending on the motors speed. NB: I haven’t used an inductor yet to filter the current noise from the motors, because 1) I’m an idiot and 2) I hadn’t suitable inductors at hand, so it was easier to fix the problem in software !